Chapter 6. Inside the DM16

The DM16-R8 system design block diagram is given below. Each section of the block diagram represents a separate printed circuit board

The system is designed around a low power, high performance 16bit microprocessor (Hitachi H8/500 series) and utilises the Motorola 56002 DSP, triggered by the H8 timing system

The H8 features a large address space (1Mb - 16 *64k pages) for data storage and manipulation and many integrated functions such as multiple timers and serial i/o ports.

The modular (paged) structure of the processor architecture is used to advantage in the modular design of the system, each module being assigned to a separate ‘page’. Each module is associated with an ‘I/O’ function and can simply be added to the system at an available page. Every module includes 32k of RAM which is used for data buffering and workspace for the module’s software.

An important feature of the system design is it’s ability to synchronise the sampling of the analogue to digital converter to an external time reference so that data samples are accurately time stamped (at the source). The microprocessor timebase serves as the system time reference and can be synchronised and tuned to an external reference such as GPS to maintain sampling accurately synchronised to UTC. To avoid the cost and power consumption of multiple GPS receivers in larger arrays the systems can also be synchronised to a centrally transmitted time reference using a scheme similar to that employed by the National Radio Time Standards (WWV,MSF and DCF77). As this only involves sending 2 characters per second it can utilise a low band-width, even half-duplex link.

To achieve the high degree of timing precision required for a 16 bit digitizer system the microprocessor timebase is run from a precision voltage controlled oscillator which is software controlled from the external reference so that its frequency is accurately set and maintained with temperature and ageing. The control is sufficiently accurate to maintain precision sampling for long periods (several hours) in the absence of an external reference once the system has stabilised.

All the timing functions are derived via the internal timer/counter channels from the precisely set processor frequency so that sampling and time-stamping are accurately maintained with reference to UTC. The system also automatically compensates for the pure time delay introduced by the digital filtering/decimation of the DSP which provides data output at different sample rates simultaneously.

The main microprocessor board incorporates a battery-backed Real-Time Clock and RAM which is used to set the systems internal software clock at start-up independent of the availability of the external time reference. The RAM is used to store system parameters such as the optimum control voltage setting for the system timebase and the system configuration.

The microprocessor module includes the (multi-tasking) system operating software in 64K EPROM. This module also has 512k of static RAM for system workspace and data buffering depending on the system requirements (number of data channels and sample rates).

The DSP software consists of 3 cascaded programmable filter/decimation stages allowing multiple data output rates to be simultaneously selected. The first stage is set to decimate the data by 10 resulting in a data output rate of 200 samples/sec. The following 2 stages can be set individually for decimation factors of 2, 4, 5, 8, and 10 allowing data to be output at lower rates requiring less storage and transmission bandwidth. For example, a system can be configured to provide data at 200, 50, and 10 samples/sec covering the whole of the seismological broad band range.

The configuration of the DSP is programmable (in the field) via the host H8 microprocessor. The H8 communicates with the DSP via its high speed 8-bit ‘host port’, which allows the operating mode/configuration to be altered and the resulting processed/filtered data to be acquired.

Each of the serial ports on a module can be configured for a wide range of standard baud rates (with different settings available for transmit and receive channels), allowing a wide range of data links to be used depending on the required data rates.

The serial port module includes 32k RAM for data buffering and formatting by the transmission/reception process.